LOOP ANALYSIS

Loop analysis is a method for obtaining loop currents. The technique uses Kir-
choff voltage law (KVL) to write a set of independent simultaneous equations.
The Kirchoff voltage law states that the algebraic sum of all the voltages
around any closed path in a circuit equals zero.

In loop analysis, we want to obtain current from a set of simultaneous equa-
tions. The latter equations are easily set up if the circuit can be drawn in pla-
nar fashion. This implies that a set of simultaneous equations can be obtained
if the circuit can be redrawn without crossovers.

For a planar circuit with n-meshes, the KVL can be used to write equations for
each mesh that does not contain a dependent or independent current source.
Using KVL and writing equations for each mesh